XC2S Series: The Spartan®-II FPGA family

The Spartan®-II Field-Programmable Gate Array family gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low price. The six-member family offers densities ranging from 15,000 to 200,000 system gates. System performance is supported up to 200 MHz. Features include block RAM (to 56K bits), distributed RAM (to 75,264 bits), 16 selectable I/O standards, and four DLLs. Fast, predictable interconnect means that successive design iterations continue to meet timing requirements.The Spartan-II family is a superior alternative to mask-programmed ASICs. The FPGA avoids the initial cost, lengthy development cycles, and inherent risk of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary (impossible with ASICs).

Features

• Second generation ASIC replacement technology
    - Densities as high as 5,292 logic cells with up to 200,000 system gates
    - Streamlined features based on Virtex® FPGA  architecture
    - Unlimited reprogrammability
    - Very low cost
    - Cost-effective 0.18 micron process
• System level features
    - SelectRAM™ hierarchical memory:
        · 16 bits/LUT distributed RAM
        · Configurable 4K bit block RAM
        · Fast interfaces to external RAM
    - Fully PCI compliant
    - Low-power segmented routing architecture
    - Full readback ability for verification/observability
    - Dedicated carry logic for high-speed arithmetic
    - Efficient multiplier support
    - Cascade chain for wide-input functions
    - Abundant registers/latches with enable, set, reset
    - Four dedicated DLLs for advanced clock control
    - Four primary low-skew global clock distribution nets
    - IEEE 1149.1 compatible boundary scan logic
• Versatile I/O and packaging
    - Pb-free package options
    - Low-cost packages available in all densities
    - Family footprint compatibility in common packages
    - 16 high-performance interface standards
    - Hot swap Compact PCI friendly
    - Zero hold time simplifies system timing
• Core logic powered at 2.5V and I/Os powered at 1.5V, 2.5V, or 3.3V
• Fully supported by powerful Xilinx® ISE® development
system
    - Fully automatic mapping, placement, and routing
 
For further information please view it online: XC2S150 (pdf | 99 pages)

This Spartan-II FPGA data sheet is in four modules :
Module 1: Introduction and Ordering Information
    • Introduction
    • Features
    • General Overview
    • Product Availability
    • User I/O Chart
    • Ordering Information
 Module 2: Functional Description
    • Architectural Description
        - Spartan-II Array
        - Input/Output Block
        - Configurable Logic Block
        - Block RAM
        - Clock Distribution: Delay-Locked Loop
        - Boundary Scan
    • Development System
    • Configuration
        - Configuration Timing
    • Design Considerations
Module 3: DC and Switching Characteristics
    • DC Specifications
        - Absolute Maximum Ratings
        - Recommended Operating Conditions
        - DC Characteristics
        - Power-On Requirements
        - DC Input and Output Levels
    • Switching Characteristics
        - Pin-to-Pin Parameters
        - IOB Switching Characteristics
        - Clock Distribution Characteristics
        - DLL Timing Parameters
        - CLB Switching Characteristics
        - Block RAM Switching Characteristics
        - TBUF Switching Characteristics
        - JTAG Switching Characteristics
Module 4: Pinout Tables
    • Pin Definitions
    • Pinout Tables

74F139: High Speed, Dual 1-of-4 Decoder/Demultiplexer

The 74F139 is a high speed, dual 1-of-4 decoder/demultiplexer. This device has two independent decoders, each accepting two binary weighted inputs and providing four mutually exclusive active-Low outputs. Each decoder has an active-Low Enable. When Enable is High, every output is forced High. The Enable can be used as the Data input for a 1-of-4 demultiplexer application.

FEATURES

• Demultiplexing capability
• Two independent 1-of-4 decoders
• Multifunction capability

For further information please view it online: 74F139 (pdf | 4 pages)

IRF9540N: HEXFET® Power MOSFET

  Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low  on-resistance per silicon area.  This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

  The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts.  The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.

FEATURES :

•          Advanced Process Technology
•      Dynamic dv/dt Rating
•       175°C Operating Temperature
•      Fast Switching
•      P-Channel
•       Fully Avalanche Rated

     For further information please view it online: IRF9540N (pdf | 9 pages)

IRFZ44N: Advanced HEXFET® Power MOSFETs 50 Watts

Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts.   The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.

FEATURE :

•  Advanced Process Technology
•  Ultra Low On-Resistance
•  Dynamic dv/dt Rating
•  175°C Operating Temperature
•  Fast Switching                                               
•  Fully Avalanche Rated

For further information please view it online: IRFZ44N (pdf | 8 pages)

TDA8783: 10-bit ADC for CCD cameras

The TDA8783 is a 10-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, AGC and a low-power 10-bit. Analog-to-Digital Converter (ADC) together with its reference voltage regulator. The AGC and CDS have a bandwidth circuit controlled by on-chip DACs via a serial interface. A 10-bit DAC controls the ADC input clamp level. An additional 8-bit DAC is provided for additional system controls; its output voltage range is 1.4 V (p-p) which is available at pin OFDOUT.
FEATURES
• Correlated Double Sampling (CDS), AGC, 10-bit ADC and reference regulator included, adjustable bandwidth (CDS and AGC)
• Fully programmable via a 3-wire serial interface
• Sampling frequency up to 40 MHz
• AGC gain from 4.5 to 34.5 dB (in 0.1 dB steps)
• CDS programmable bandwidth from 4 to 120 MHz
• AGC programmable bandwidth from 4 to 54 MHz
• Standby mode available for each block for power saving applications 20 mW (typ.)
• 6 dB fixed gain analog output for analog iris control
• 8-bit and 10-bit DAC included for analog settings
• Low power consumption of only 483 mW (typ.)
• 5 V operation and 2.5 to 5.25 V operation for the digital outputs
• TTL compatible inputs, TTL and CMOS compatible outputs.
APPLICATIONS
• CCD camera systems.
For further information please view it online: TDA8783 (pdf | 28 pages)